PowerPC e600

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Lua error in package.lua at line 80: module 'strict' not found.The PowerPC e600 is a family of 32-bit Power Architecture microprocessor cores developed by Freescale for primary use in high performance system-on-a-chip (SoC) designs with speed ranging over 2 GHz, thus making them ideal for high performance routing and telecommunications applications. The e600 is the continuation of the PowerPC 74xx design.

The e600 is a superscalar out-of-order RISC core with 32/32 kB L1 data/instruction caches, a seven-stage, three-issue pipeline with load/store, system register, powerful branch prediction, integer unit, a double precision FPU and an enhanced 128-bit AltiVec unit with limited out-of-order execution. The core is designed to work in multiprocessing and multi core designs and can take large amounts of L2 caches on die.

The e600 core is not compatible with the new Power ISA specification but adheres to the earlier PowerPC specification and is completely backwards compatible with the PowerPC 74xx cores from which it derives.

CPUs

File:PowerPC G4e.png
The e600 core design.

In 2004 Freescale renamed the PowerPC 74xx core e600 and changed focus from general CPUs to high end embedded SoC devices, and introduced a new naming scheme, MPC86xx. The 7448 was to be the last pure 74xx and it formed the base of the new e600 core.

MPC7448

The 7448 is an evolution of the PowerPC 7447 and is essentially a faster (up to 2 GHz) and more power-efficient version of the 7447A manufactured in 90 nm with 1 MB L2 cache and up to 200 MHz front side bus and it features Freescale's new standard core, the e600.

MPC864x

The problems associated with the bandwidth-constrained external MPX bus interface found on the 74xx series are relieved with single (MPC8641) or dual (MPC8641D) e600 cores, faster system interface via RapidIO, dual x8 PCI Express and an on-die 667 MHz MPX interconnect between I/O, the cores, and dual 64-bit DDR2-memory controllers (with ECC). The product also features four on-chip Gigabit ethernet controllers with TCP/UDP offloading features. The dual core MPC8641D has support for asymmetric multiprocessing, which enables two operating systems to run on the same device simultaneously, sharing resources but largely unaware of each other.

The MPC8641 (single core) and MPC8641D (dual core) are manufactured on a 90 nm SOI based process. 8641 draws less than 16W at 1.33 GHz and 8641D less than 25W at 1.5 GHz.

Introduced in summer of 2008, the MPC8640 and MPC8640D are low power, low cost versions of the MPC8641 parts. Clocked at 1-1.25 GHz they draw 14-21W power while being identical to their older brethren in other respects.

MPC8610

Introduced in 2007 the MPC8610 is a host processor with integrated graphics processor supporting 24-bit screens sizes up to 1280x1024 pixels. It is a single core CPU with 256 kB on die L2 cache. Manufactured on a 90 nm process, it reaches speeds from 667 to 1333 MHz.

Device list

This list is a complete list of known core e600 based designs (excluding older 74xx designs). The pictures are illustrations and not to scale.

Name Image Fab Transistors Die size Cores Clock L2 cache L3 cache Package Introduced
MPC7448 100px 90 nm SOI 90 M 58.44 mm2 1 1000 - 1700 MHz 1024 kB n/a 360 pin CBGA
360pin CLGA
2005
MPC8641D
MPC8641
100px 90 nm SOI 225 M 177.87 mm2 2
1
1000 - 1500 MHz 2× 1024 kB
1× 1024 kB
n/a 1023 pin CBGA 2007
MPC8610 100px 90 nm SOI 82.45 mm2 1 667 - 1333 MHz 256 kB n/a 783 pin PBGA 2008
MPC8640D
MPC8640
100px 90 nm SOI 225 M 177.87 mm2 2
1
1000 - 1250 MHz 2× 1024 kB
1× 1024 kB
n/a 1023 pin CBGA 2008

See also

External links